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| author | Titus von Koeller <titus@vonkoeller.com> | 2022-08-01 09:32:47 -0700 |
|---|---|---|
| committer | Titus von Koeller <titus@vonkoeller.com> | 2022-08-01 09:32:47 -0700 |
| commit | ea7c14f8ef64924f2d0ff80df3cdabf2c7299848 (patch) | |
| tree | 3b9ec443a259cf36d87627a8e2cc7d13513f6a21 /bitsandbytes/optim/rmsprop.py | |
| parent | 3fd06fb6206f46b6d18fbb8a512da63832dea98b (diff) | |
reran black with linelength 80 for greater readability
Diffstat (limited to 'bitsandbytes/optim/rmsprop.py')
| -rw-r--r-- | bitsandbytes/optim/rmsprop.py | 12 |
1 files changed, 9 insertions, 3 deletions
diff --git a/bitsandbytes/optim/rmsprop.py b/bitsandbytes/optim/rmsprop.py index 679f783..7ddb12c 100644 --- a/bitsandbytes/optim/rmsprop.py +++ b/bitsandbytes/optim/rmsprop.py @@ -22,7 +22,9 @@ class RMSprop(Optimizer1State): block_wise=True, ): if alpha == 0: - raise NotImplementedError(f"RMSprop with alpha==0.0 is not supported!") + raise NotImplementedError( + f"RMSprop with alpha==0.0 is not supported!" + ) if centered: raise NotImplementedError(f"Centered RMSprop is not supported!") super(RMSprop, self).__init__( @@ -56,7 +58,9 @@ class RMSprop8bit(Optimizer1State): block_wise=True, ): if alpha == 0: - raise NotImplementedError(f"RMSprop with alpha==0.0 is not supported!") + raise NotImplementedError( + f"RMSprop with alpha==0.0 is not supported!" + ) if centered: raise NotImplementedError(f"Centered RMSprop is not supported!") super(RMSprop8bit, self).__init__( @@ -91,7 +95,9 @@ class RMSprop32bit(Optimizer1State): ): if alpha == 0: - raise NotImplementedError(f"RMSprop with alpha==0.0 is not supported!") + raise NotImplementedError( + f"RMSprop with alpha==0.0 is not supported!" + ) if centered: raise NotImplementedError(f"Centered RMSprop is not supported!") super(RMSprop32bit, self).__init__( |